募集要項
- 募集背景
- #新型コロナ禍でも積極採用中
- 仕事内容
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- Define standard cell circuit requirement and complete design from schematic, layout and verification.
- Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre.
- Optimize circuit to achieve best PPA for TSMC technology
- Path finding and innovation of circuit design for leading edge tech nodes
- Sub threshold voltage circuit design for IoT application.
- Co-work with layout engineer to define architecture optimized for speed, power, and EMIR.
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ビジネス好調な世界最大手のファンダリーでご活躍頂けます。
- 応募資格
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- 必須
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求める学歴：大学卒以上
- BCH degree with 10+ years of experiences / MST degree with 3+ years of experience / PhD degree in relevant field.
- Demonstrable work experience in a similar circuit design role.
- In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes.
- Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus.
- Strong written and oral communication skills in English is a plus.
- 雇用形態
- 正社員 ※試用期間3ヶ月
- 勤務地
- 神奈川県 横浜 ※転勤なし
- 年収・給与
- 年収：900万円～1100万円
- 待遇・福利厚生
- 各種完備
- 休日休暇
- 週休2日（土日）、祝日休、夏休み、年末年始休
